1. Field of the Invention
The present invention relates to a nonvolatile semiconductor memory device having a built-in self-test (BIST) function and a method of self-testing the same, e.g., a NOR flash memory having the BIST function and a self-testing method which performs a test by using the BIST function.
2. Description of the Related Art
Recently, a nonvolatile semiconductor memory device (chip) has the BIST function of self-testing whether memory cells are normally operating. The BIST is a technique which enables a self-test by forming a circuit for generating a signal for conducting the self-test inside a chip, so as to perform the self-test inside the chip by only supplying minimum necessary inputs such as electric power, a clock signal, and a predetermined signal to the chip (e.g., Jpn. Pat. Appln. KOKAI Publication No. 2000-227459).
As described above, a nonvolatile semiconductor memory device must be tested to check whether the chip is normally operating by using the BIST, but the increase in test time is becoming a problem as the storage capacity increases. In particular, the test time of the BIST conducted in a NOR flash memory prolongs because an erase operation requires a long time.
To reduce the test time, therefore, the number of chips which can be tested by one measurement is increased by simultaneously testing a plurality of chips, thereby practically shortening the test time for one chip.
Unfortunately, the number of pads to be brought into contact with a probe is physically limited, and this limits the number of chips which can be tested at the same time by one measurement. This makes it impossible to shorten the test time as planned.